The focus of this journal is on formal methods for designing, implementing, and validating the correctness of hardware (VLSI) and software systems. The stimulus for starting a journal with this goal came from both academia and industry. In both areas, interest in the use of formal methods has increased rapidly during the past few years. The enormous cost and time required to validate new designs has led to the realization that more powerful techniques must be developed. A number of techniques and tools are currently being devised for improving the reliability, and robustness of complex hardware and software systems. While the boundary between the (sub)components of a system that are cast in hardware, firmware, or software continues to blur, the relevant design disciplines and formal methods are maturing rapidly. Consequently, an important (and useful) collection of commonly applicable formal methods are expected to emerge that will strongly influence future design environments and design methods.

本期刊的重点是设计、实施和验证硬件（VLSI）和软件系统正确性的形式化方法。以此为目标创办期刊的动机来自学术界和工业界。在这两个领域，人们对使用形式化方法的兴趣在过去几年中迅速增加。验证新设计所需的巨大成本和时间使人们意识到必须开发更强大的技术。目前正在设计许多技术和工具来提高复杂硬件和软件系统的可靠性和稳健性。虽然系统中硬件、固件或软件的（子）组件之间的界限继续模糊，但相关的设计学科和形式化方法正在迅速成熟。因此，预计将出现一个重要（且有用）的常用形式化方法集合，这将对未来的设计环境和设计方法产生重大影响。

该刊已被国际权威数据库SCIE收录，该刊致力于发表经过严格同行评审的高质量原创文章，反映工程技术-计算机：理论方法领域的新进展、新技术、新成果，促进该领域科研交流和科研成果转化。该刊2023年影响因子为0.7，平均审稿速度为 12周，或约稿 ，近四年来没有被列入预警名单。如果您需要投稿发表服务及指导，可以联系我们的客服老师，我们专业专注服务期刊投稿协助10年，为您提供期刊投稿个性化定制服务，并且我们确保严格保密您的个人信息及稿件内容。